The phase detector output controls a charge pump whose output is integrated
in an off-chip loop filter. The loop filter output is then applied to an
integrated VCO. The VCO output at 2 × fLO is then applied to a local oscillator
(LO) divider as well as to a programmable PLL divider.
The programmable divider is controlled by an Σ-Δ modulator (SDM). The modulus of
the SDM can be programmed between 1 and 2047.
The broadband, active mixer employs a bias adjustment to allow for enhanced IP3
performance at the expense of increased supply current. The mixer provides an
input IP3 exceeding 25 dBm with 12 dB single sideband NF under typical
conditions. The IIP3 can be boosted to ~29 dBm with roughly 20 mA of additional
supplied current. The mixer provides a typical voltage conversion gain of 6 dB
with a 200 Ω differential IF output impedance. The IF output can be externally
matched to support upconversion over a limited frequency range.
The ADRF6655 is fabricated using an advanced silicon-germanium BiCMOS process.
It is packaged in a 40-lead, exposed-paddle, Pb-free, 6 mm × 6 mm LFCSP.
Performance is specified over a −40°C to +85°C temperature range.
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