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Microchip Acquires High-Level Synthesis Tool Provider LegUp to Simplify Development of PolarFire FPGA-based Edge Compute Solutions
Software engineers can now map applications coded in C/C++ directly into PolarFire FPGAs and SoCs that are the industry’s lowest-power mid-range fabric solutions for acceleration

Microchip Technology Inc. announced it acquired Toronto-based LegUp Computing Inc., expanding its Field-Programmable Gate Array (FPGA)-based edge compute solution stack with a high-level synthesis (HLS) tool. Commercialized from University of Toronto research, the LegUp HLS tool will make it easier for a larger community of software engineers to harness the algorithm-accelerating power of Microchip’s PolarFire® FPGA and PolarFire System on Chip (SoC) platforms.

“The LegUp team brings us deep experience in high-level synthesis and related technologies as we continue to optimize the integrated design environment tool flows for our PolarFire FPGA and PolarFire SoC customers,” said Bruce Weyer, vice president of the FPGA business unit at Microchip. “The acquisition also gives our traditional Microchip MCU and MPU clients the ability to use FPGAs as accelerators through an easy-to-use compiler that will substantially improve their design productivity and system performance while shortening their time to market.”

The LegUp HLS tool will be used alongside Microchip’s VectorBlox Accelerator Software Design kit and VectorBlox Neural Networking IP generator to provide a complete front-end solution stack for C/C++ algorithm developers who want to work with PolarFire FPGA and PolarFire SoC devices without having to understand the underlying Register Transfer Level (RTL) development flows. Microchip acquired Vancouver, Canada-based VectorBlox Computing in August 2019 to enhance its portfolio of solutions for edge compute applications.

“Software engineers needing hardware acceleration demand performance and power efficiency, while looking for tools that enable higher levels of abstraction for the hardware that will implement their compute-intensive algorithms,” said Andrew Canis, CEO of LegUp Computing, now part of Microchip. “We are very pleased to be part of a team that will help fuel rapid innovation for edge compute applications as we enable developers to leverage innovative software algorithms developed in C/C++ to be ported to low-power, thermally elegant, and compute-efficient PolarFire FPGAs and SoCs."

Microchip will be making the LegUp HLS tool available to early access customers immediately and roll out a fully integrated design flow in the first half of 2021. For more information on early access, contact legup@microchip.com.

About the Microchip PolarFire Family

Microchip’s award-winning PolarFire FPGAs deliver 50 percent lower power than alternative solutions at mid-range densities while providing high levels of security and reliability.  Built on the same FPGA architecture, the PolarFire FPGA SoC is a multi-core RISC-V device that uses a deterministic, coherent RISC-V CPU cluster and deterministic L2 memory subsystem to provide the highest performance for acceleration applications with the greatest power efficiency.

For more information on products and history or for contact information visit www.legupcomputing.com.

2020111502 / 14.11.2020 / Various / Microchip Technology Inc. /

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Microchip’s RTG4™ FPGAs with Lead-Free Flip-Chip Bumps Achieve Highest Space Qualification
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Microchip Releases 20 Advanced Wi-Fi® Products for Industrial and Commercial Applications
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New VelocityDRIVE™ Software Platform and Automotive-Qualified Multi-Gigabit Ethernet Switches for Software-Defined Vehicles

New Family of Voltage-Controlled Saw Oscillators With Ultra-Low Phase Noise Performance for Radar Applications
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New Solution from Microchip Makes it Easier to Build Sophisticated Graphical User Interfaces for MPLAB® Harmony v3 and Linux® Environments

Functional Safety Certification for Microchip’s PolarFire® FPGAs Speeds Time to Market
Certified tool flow and safety data package available for both IEC 61508 SIL 3 and ISO 26262 ASIL D standards

Expanded Single Pair Ethernet Portfolio with 100BASE-T1 and 1000BASE-T1 PHY Transceivers for Network Interoperability
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Microchip Technology Adds ECC20x and SHA10x Families of Secure Authentication ICs to TrustFLEX Platform
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